The present invention relates to field effect transistors (FET), and more specifically, to finFET devices.
FinFET devices typically include semiconductor fins that are arranged on a substrate. Gate stacks are arranged on the fins and define channel regions of the device. The source and drain active regions of the device are adjacent to the channel region.
In fabrication, sacrificial dummy gate stacks are often formed prior to forming the active regions of the device. The dummy gate stacks define the channel region, and are formed from a material such as polysilicon. A material such as nitride or oxide is often used to form spacers adjacent to the gate stacks. The dummy gate stacks allow fabrication processes such as ion implantation and annealing or epitaxial growth process to be performed prior to forming the gate stacks. Such high temperature processes can undesirably degrade the materials in the gate stacks, thus the dummy gate is used to define and protect the channel region while the active regions are formed.
Often a wafer includes nFET and pFET devices. The devices are distinguished by the type of materials in the active regions of the devices. The active regions may be formed by ion implantation and/or epitaxially growing doped silicon materials.